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 74VHC245 Octal Bidirectional Transceiver with 3-STATE Outputs
November 1992 Revised March 1999
74VHC245 Octal Bidirectional Transceiver with 3-STATE Outputs
General Description
The VHC245 is an advanced high speed CMOS octal bus transceiver fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The VHC245 is intended for bidirectional asynchronous communication between data busses. The direction of data transmission is determined by the level of the T/R input. The enable input can be used to disable the device so that the busses are effectively isolated. All inputs are equipped with protection circuits against static discharge.
Features
s High Speed: tPD = 4.0 ns (typ) at VCC = 5V s High Noise Immunity: VNIH = VNIL = 28% VCC (Min) s Power Down Protection is provided on all inputs s Low Noise: VOLP = 0.9V (typ) s Low Power Dissipation: ICC = 4 A (Max) @ TA = 25C s Pin and Function Compatible with 74HC245
Ordering Code:
Order Number 74VHC245M 74VHC245SJ 74VHC245MTC 74VHC245N Package Number M20B M20D MTC20 N20A Package Description 20-Lead Small Outline Integrated Package (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Description
Pin Names OE T/R A0-A7 B0-B7 Output Enable Input Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs Description
Truth Table
Inputs OE L L H T/R L H X Bus B Data to Bus A Bus A Data to Bus B HIGH-Z State Outputs
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Any unused bus terminals during HIGH-Z State must be held HIGH or LOW.
(c) 1999 Fairchild Semiconductor Corporation
DS011520.prf
www.fairchildsemi.com
74VHC245
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) DC Input Voltage (VIN) (T/R, OE) DC Output Voltage (VOUT) Input Diode Current (IIK) (T/R, OE) Output Diode Current (IOK) DC Output Current (IOUT ) DC VCC/GND Current (ICC) Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, 10 seconds) 260C -0.5V to +7.0V -0.5V to 7.0V -0.5V to VCC + 0.5V -20 mA 20 mA 25 mA 75 mA -65C to +150C
Recommended Operating Conditions (Note 2)
Supply Voltage (VCC) Input Voltage (VIN)(T/R, OE) Output Voltage (VOUT) Operating Temperature (TOPR) Input Rise and Fall Time (tr, tf) VCC = 3.3V 0.3V VCC = 5.0V 0.5V 0 100 ns/V 0 20 ns/V 2.0V to 5.5V 0V to 5.5V 0V to VCC -40C to +85C
Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. Note 2: Unused inputs or I/O pins must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol VIH VIL VOH Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage VCC (V) 2.0 3.0 - 5.5 2.0 3.0 - 5.5 2.0 3.0 4.5 3.0 4.5 VOL LOW Level Output Voltage 2.0 3.0 4.5 3.0 4.5 IOZ 3-STATE Output Off-State Current 5.5 0 - 5.5 5.5 0.25 0.1 4.0 2.5 1.0 40.0 A A A 1.9 2.9 4.4 2.58 3.94 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 2.0 3.0 4.5 TA = 25C Min 1.50 0.7 VCC 0.50 0.3 VCC 1.9 2.9 4.4 2.48 3.80 0.1 0.1 0.1 0.44 0.44 V IOL = 4 mA IOL = 8 mA VIN = VCC or GND VOUT = VCC or GND VIN OE = VIH or VIL IIN (T/R, OE) ICC Input Leakage Current Quiescent Supply Current VIN = VCC or GND VIN = 5.5V or GND V V IOH = -4 mA IOH = -8 mA VIN = VIH IOL = 50 A or VIL V Typ Max TA = -40C to +85C Min 1.50 0.7 VCC 0.50 0.3 VCC Max V V VIN = VIH IOH = -50 A or VIL Units Conditions
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2
74VHC245
Noise Characteristics
Symbol VOLP (Note 3) VOLV (Note 3) VIHD (Note 3) VILD (Note 3) Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum HIGH Level Dynamic Input Voltage Maximum LOW Level Dynamic Input Voltage 5.0 1.5 V CL = 50 pF 5.0 3.5 V CL = 50 pF 5.0 -0.9 -1.2 V CL = 50 pF VCC (V) 5.0 TA = 25C Typ 0.9 Limits 1.2 Units V CL = 50 pF Conditions
Note 3: Parameter guaranteed by design.
AC Electrical Characteristics
Symbol tPLH tPHL Parameter Propagation Delay Time 5.0 0.5 tPZL tPZH 3-STATE Output Enable Time 5.0 0.5 tPLZ tPHZ tOSLH tOSHL CIN (T/R, OE) CI/O CPD Output Capacitance Power Dissipation Capacitance
Note 4: Parameter guaranteed by design. tOSLH = |tPLH max - tPLH min|; t OSHL = |tPHL max - tPHL min| Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) = CPD * VCC * fIN + ICC/8 (per Bit).
VCC (V) 3.3 0.3
TA = 25C Min Typ 5.8 8.3 4.0 5.5 8.5 11.0 5.8 7.3 11.5 7.0 Max 8.4 11.9 5.5 7.5 13.2 16.7 8.5 10.6 15.8 9.7 1.5 1.0 4 10
TA = -40C to +85C Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max 10.0 13.5 6.5 8.5 15.5 19.0 10.0 12.0 18.0 11.0 1.5 1.0 10
Units ns ns ns ns ns ns pF
Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF RL = 1 k CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF RL = 1 k CL = 50 pF CL = 50 pF (Note 4) CL = 50 pF CL = 50 pF VCC = Open VCC = 5.0V (Note 5)
3.3 0.3
3-STATE Output Disable Time Output to Output Skew Input Capacitance
3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5
8 21
pF pF
3
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74VHC245
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D
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4
74VHC245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20
5
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74VHC245 Octal Bidirectional Transceiver with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.


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